Apple supplier expects to start volume production of 3 nm chips as early as 2022

This year, TSMC launched chips made using its 5nm process node. The first smartphones launched with a 5 nm chip were the Apple iPhone 12 series featuring the A14 Bionic chipset. Apple also has this chip that powers the iPad Air (2020). The 5nm A14 Bionic has a transistor density of 134 million transistors per square mm compared to 89.97 million transistors per square mm in the 7nm A13 Bionic. The transistor count for the A14 Bionic is 11.8 billion compared to 8.5 billion transistors for the A13 Bionic. These additional transistors found on the A14 Bionic make it a more powerful and more energy efficient performer than the A13 Bionic.

The Bionic A16 may be the first chip built into the 3 nm process node

Android phone manufacturers will have their own 5 nm chips for use with the Snapdragon 888 or Exynos 2100. Both are produced not only using the 5 nm node, but also by Samsung Foundry. The recently announced The Samsung Galaxy S21 series uses both chips, depending on the region where the device was purchased. Meanwhile, Digitimes reported today that TSMC will begin risky production of its 3 nm chips this year, with volume production starting during the second half of next year. During the founder’s quarterly earnings report announced on Thursday, TSMC CEO CC Wei said, “Our N3 technology development is on track with good progress. We are seeing a much higher level of customer engagement for applications. of HPC and smartphones on the N3 compared to the N5 and N7 at a similar stage. ”

If TSMC follows this roadmap, we should see the iPhone 14 line becoming the first devices manufactured by Apple to employ chips produced with the 3nm process node. The first of these chips would be the A16 Bionic. Last November, TSMC completed the plant structure for its 3 nm factory in Southern Taiwan Science Park (STSP). TSMC originally planned to start experimental production of 3 nm in late 2020. But the global pandemic forced TSMC to postpone this by one year.

Instead of spending $ 20 billion to $ 28 billion this year on capital expenditures, as estimated by analysts, TSMC says that this range will be increased by $ 25 billion to $ 28 billion. The complexity of the technology required to build 3nm chips is one of the reasons for the higher spending. TSMC is also losing money when buying EUV lithography equipment. Extreme Ultraviolet Lithography is used to record extremely thin lines on a wafer. These are the patterns that determine the placement of the transistors within a chip. Considering that billions of transistors are used on each chip, these lines should be as thin as possible and that is where the EUV Litography machine comes in.

TSMC will use FinFET transistors for its 3 nm chips, while Samsung will switch from FinFET to GAA (gate-all-around). For 2nm, TSMC will use a GAA design. Samsung reportedly spent approximately $ 116 billion to develop its 3 nm integrated circuits. We can see the mass production of 2 nm chips starting in 2024, at least.

The observation made by Intel co-founder Gorgon Moore, known as Moore’s law, demanded that the density of the transistor double every two years, and in recent years, we have not seen the industry adhere to that law perfectly. And now, since 2 nm is within range, the question is whether Moore’s Law will be able to continue. Foundries have been working on using alternative materials that may be able to continue to improve chip performance and energy consumption beyond 2 nm. Just as the EUV helped to keep Moore’s Law valid after the 10 nm process node, something new could be found to keep Moore’s Law alive.

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