Although they are often not as good as CPUs, FPGAs can do a wonderful job, speeding up specific tasks. Whether accelerating, acting as a framework for large-scale data center services, increasing AI performance, an FPGA in the hands of a capable engineer can offload a wide variety of tasks from a CPU and speed up processes. Intel has talked a lot about integrating Xeons with FPGAs in the past six years, but this has not resulted in a single product reaching its line. A new AMD patent, however, may mean that the newcomer FPGA may be ready to make one on its own.
In October, AMD announced plans to acquire Xilinx as part of a major data center onslaught. On Thursday, the United States Patent and Trademark Office (USPTO) published an AMD patent for integrating programmable execution units with CPU. AMD made 20 claims in its patent application, but the gist is that a processor can include one or more execution units that can be programmed to handle different types of custom instruction sets. This is exactly what an FPGA does. It may take a while before we see products based on this project, as it seems a little early to be part of CPUs included in recent EPYC leaks.
Although AMD has made waves with its chip designs for Zen 2 and Zen 3 processors, that doesn’t seem to be what is happening here. The programmable unit in AMD’s FPGA patent actually shares records with the processor’s floating-point and full-run units, which would be difficult, or at least very slow, if they weren’t in the same package. This type of integration should make it easier for developers to insert these custom instructions into applications, and the CPU will only know how to pass them to the FPGA on the processor. These programmable units can handle atypical data types, specifically FP16 (or half-precision) values used to accelerate AI training and inference.
In the case of multiple programmable units, each unit can be programmed with a different set of specialized instructions, so that the processor can accelerate multiple sets of instructions, and these programmable EUs can be reprogrammed in real time. The idea is that when a processor loads a program, it also loads a bitfile that configures the programmable execution unit to speed up certain tasks. The decoding and dispatching unit of the CPU itself could address the programmable unit, passing these personalized instructions to be processed.
AMD has been working on different ways to accelerate AI calculations for years. First, the company announced and launched the Radeon Impact series of AI accelerators, which were just big headless Radeon graphics processors with custom drivers. The company doubled that with the launch of MI60, its first 7 nm GPU before the launch of the Radeon RX 5000 series in 2018. A move to focus on AI via FPGAs after the acquisition of Xilinx makes sense, and we look forward to seeing the that the company presents.