Today AMD launches its new Ryzen 5000 mobile line of CPUs based (mainly) on the Zen 3 core. The important parts were suggested by AMD weeks ago, so SemiAccurate will give you a lot of interesting details.
The main parts of AMD’s Ryzen 5000 mobile / APU (R5KM) are well known because they are already available in different forms. Zen 3 cores are on the market in the Ryzen 5000 non-mobile line on the CCD chip on these CPUs. In the appearance of the APU, there are some differences, mainly that the core complex is a unified 16 MB L3 cache instead of 2×4 MB on Zen models 2, both with half the cache of their server / HEDT siblings.
Half the cache, all cores
Notice the bottom right corner
Things get interesting when you dive a little deeper under the hood. If you look at the U series in the table above, you will see that three of the five, 5700U, 5500U and 5300U, are all based on Zen 2, rather than the expected Zen 3 cores. That means half the cache, the old core architecture and more. Fortunately for AMD, these cores are very good, market leaders in many ways, so their inclusion, or at least not having Zen 3-based SoCs for these parts, is not the end of the world.
Very mandatory shooting
So, why do that? Why regress especially since the rest of the SoC is exactly the same as the parts of Zen 3? Money, or at least cost, which seems a little counterintuitive, since AMD has to design, record and validate a second piece of data for just three SKUs. That answer is at the bottom of the image above, the part that reads 180 mm and 10.7B transistors. The Zen 2 SKUs are in the same process, but occupy 156 mm and 9.8B transistors, a savings of approximately 10% in the matrix area. Most of this is explained by having 8 MB less than L3 cache, but the cores are also slightly smaller.
Buy these versions
AMD claims that OEMs are very price sensitive and that the margin is important, so Zen 2 to the rescue. As AMD is severely limited by capacity at the moment, a 10% savings in the area for higher volume SKUs is also welcome. AMD says it will put a holographic sticker on all Zen 3 models to differentiate them, something that SemiAccurate appreciates. The game-oriented SoCs, basically the 35/45/45 + W models, will all be based on Zen 3.
Mandatory block diagram
A very interesting detail is the CCX <-> Infinity Fabric connection. You may remember the larger / non-APU parts of the Ryzen desktop, the CCD chips were connected to the IOD chip with a 32b reading and a 16b recording per bus cycle. In APUs, this is increased to 32b / 32b R / W for Zen 2 and Zen 3-based SoCs, the 2x4C layout does not affect fabric connections. You can probably win bets at a bar with this, we will not ask for a percentage if you do.
On the memory side, the R5KM line adds two features, energy saving and LPDDR4x. The energy savings are based on a deep power state for the memory controller and AMD says it will go into less busy workloads and leave ‘fast’. During this state, PHYs are placed on a low voltage rail and therefore use less energy. This is the bet of the table to explore LPDDR4x, which is now compatible with speeds of 4266 MTps. Better yet, you can buy chips with twice the density of the DDR4 vanilla, so we expect to see laptops with increased capacity, instead of a channel with the same capacity to save a few cents.
This is the big bang in energy use
Speaking of lower power, AMD has now enabled CPPC or Collaborative Processor Performance Control on the R5KM. This closed-loop energy saving methodology has been with us for several generations in the form of a desktop, but this is the first implementation (activation?) On mobile devices. Although it is interesting in itself, the coupling of the CPPC with the voltage regulation per core in the matrix via DLDOs, as you can see above, is worth much more than any of the options alone. The GPU is also in its own voltage plane, but now the entire system is not linked to that state as it was in the R4KM. This should result in substantial energy savings.
The rest of the SoC is practically the same as the R4K line, the only real addition that SemiAccurate can find is Control-Flow Enforcement Technology (CET) in the Zen 3 tubular models. There are adjustments in the GPU to allow the reduction in restricted bandwidth situations, such as the Radeon 6000, something that may be related to the new power control of the memory controller. In any case, the rest of the system is very similar to R4KM, PCIe3, the same IO and everything else. This is not bad, but PCIe3 is getting difficult, Intel will destroy this part of the storage benchmarks as a result, and this performance is important to the author.
The positive side is that the R5KM is compatible with the R4KM pin, all the energy benefits are in the matrix, so they ‘just work’ even in transition projects. This should mean a much faster launch of new models, something we are already seeing on the market, and cost savings for OEMs who can extend the life of their sunk engineering costs for these models. If you wanted to take an optimistic view, you could say that the money that would have been used to remake the plates can now be used to make special devices, like custom gaming chassis and other related things. So far, the R5K has had a solid start.S | THE
